Senior ASIC Verification Engineer

About Nvidia

NVIDIA is committed to deliver high-quality clocking and reset logic to various units in SOC and GPU ASIC. The complexity of the clocks and resets design has increased many folds, requiring sophisticated verification to deliver a bug free clocks design to power our product lines ranging from Data Centers, Consumer graphics to Self-driving cars and the growing field of artificial intelligence.

Job Summary

The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification.

Key Responsibilities

• Own validation of Clocking structures in Tegra and GPU products from start to finish, including test plan development, automation, validation flows development, coverage metrics, test execution, bug identification/fix and productization.
• Tackle Sophisticated problems and develop a scalable solution that works across platform.
• Hands on industry-standard tools and state of the art verification methodologies.
• Partnering closely with our clocks architecture and design team to validate our clocks design.
• Coordinate with internal and external teams across time zones.

Requirements

• BS or MS in EE/ECE or equivalent experience.
• 5+ years of relevant industry work experience.
• Good understanding of Logic Design and Architecture.
• Expertise in industry-standard verification flows like SV constraint random verification, UVM, Formal Verification, Coverage metrics, profiling tools, X prop, etc.
• Strong coding skills in System Verilog, scripting languages (Perl/python) and C++.
• Ability to collaborate and work with multiple groups.

Benefits & Perks

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD – 212,750 USD for Level 3, and 168,000 USD – 264,500 USD for Level 4. You will also be eligible for equity and benefits.